DDR4
TS2GHR72V1PL
288Pin DDR4 2133 VLP RDIMM
16GB Based on 2Gx4 DDP
Description
DDR4 VLP Registered DIMM is high-speed, low power
memory module that use 2Gx4bits DDR4 SDRAM in
FBGA package and a 4Kbits serial EEPROM on a
288-pin printed circuit board. DDR4 VLP Registered
DIMM is a Dual In-Line Memory Module and is intended
for mounting into 288-pin edge connector sockets.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible
on both edges of DQS. Range of operation frequencies,
programmable latencies allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
Features
RoHS compliant products.
JEDEC standard 1.2V ± 0.06V power supply
VDDQ=1.2V ± 0.06V
Clock Freq: 1067MHZ for 2133Mb/s/Pin.
Programmable CAS Latency: 10,11,12,13,14,15,16
Programmable Additive Latency (Posted /CAS):
0,CL-2 or CL-1 clock
Programmable /CAS Write Latency (CWL)
= 11, 14(DDR4-2133)
8 bit pre-fetch
Burst Length: 4, 8
Bi-directional Differential Data-Strobe
On Die Termination with ODT pin
Serial presence detect with EEPROM
On DIMM Thermal
Asynchronous reset
Pin Identification
Register bank select input
Register bank group select input
Register row address strobe input
Register column address strobe
input
Register write enable input
CS0_n, CS1_n,
CS2_n, CS3_n
DIMM Rank Select Lines input
Register clock enable lines input
Register on-die termination control
lines input
Register input for activate input
Data Buffer data strobes
(positive line of differential pair)
Data Buffer data strobes
(negative line of differential pair)
Register clock input (positive line of
differential pair)
Register clocks input (negative line
of differential pair)
I2C serial bus clock for SPD/TS
and register
I2C serial bus data line for SPD/TS
and register
I2C slave address select for
SPD/TS and register
SDRAM command/address
reference supply
Power supply return (ground)
Serial SPD/TS positive power
supply
SDRAM activating power supply
Set Register and SDRAMs to a
Known State
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